An Fpga Implementation of a Risc-V Based Soc System for Image Processing Applications

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Date

2021

Journal Title

Journal ISSN

Volume Title

Publisher

IEEE

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Green Open Access

No

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Top 10%
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Average
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Top 10%

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Abstract

The Laplacian filter is one of the fundamental applications in image processing. In our work, the Laplacian filter has been applied to an image, and both hardware and software implementation of the filter has been studied. Our system consists of an OV7670 Camera module, Nexys 4 DDR FPGA board and VGA monitor to display the processed video stream. Mentioned process has forwarding tasks: camera module captures raw RGB data and writes to RAM, Laplacian filter IP processes raw image and the results written back to memory. VGA modules show output images to monitor. The Laplacian filter part considered in hardware and software implementation is compared in terms of time and area.

Description

Keywords

Cameras, Image processing, Streaming media, Random access memory, Hardware, Software, Laplace equations

Turkish CoHE Thesis Center URL

Fields of Science

0202 electrical engineering, electronic engineering, information engineering, 02 engineering and technology

Citation

Gholizadehazari, E., Ayhan, T., & Ors, B. (9-11 June 2021). An FPGA Implementation of a RISC-V Based SoC System for Image Processing Applications. In 2021 29th Signal Processing and Communications Applications Conference (SIU) (pp. 1-4). https://doi.org/10.1109/SIU53274.2021.9477998

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N/A
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OpenCitations Citation Count
7

Source

2021 29th Signal Processing and Communications Applications Conference (SIU)

Volume

Issue

Start Page

1-4

End Page

4
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Citations

Scopus : 10

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Mendeley Readers : 7

SCOPUS™ Citations

10

checked on Feb 03, 2026

Web of Science™ Citations

3

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Page Views

267

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Downloads

30

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