An Fpga Implementation of a Risc-V Based Soc System for Image Processing Applications
Loading...
Date
2021
Authors
Journal Title
Journal ISSN
Volume Title
Publisher
IEEE
Open Access Color
Green Open Access
No
OpenAIRE Downloads
OpenAIRE Views
Publicly Funded
No
Abstract
The Laplacian filter is one of the fundamental applications in image processing. In our work, the Laplacian filter has been applied to an image, and both hardware and software implementation of the filter has been studied. Our system consists of an OV7670 Camera module, Nexys 4 DDR FPGA board and VGA monitor to display the processed video stream. Mentioned process has forwarding tasks: camera module captures raw RGB data and writes to RAM, Laplacian filter IP processes raw image and the results written back to memory. VGA modules show output images to monitor. The Laplacian filter part considered in hardware and software implementation is compared in terms of time and area.
Description
ORCID
Keywords
Cameras, Image processing, Streaming media, Random access memory, Hardware, Software, Laplace equations
Turkish CoHE Thesis Center URL
Fields of Science
0202 electrical engineering, electronic engineering, information engineering, 02 engineering and technology
Citation
Gholizadehazari, E., Ayhan, T., & Ors, B. (9-11 June 2021). An FPGA Implementation of a RISC-V Based SoC System for Image Processing Applications. In 2021 29th Signal Processing and Communications Applications Conference (SIU) (pp. 1-4). https://doi.org/10.1109/SIU53274.2021.9477998
WoS Q
N/A
Scopus Q
N/A

OpenCitations Citation Count
7
Source
2021 29th Signal Processing and Communications Applications Conference (SIU)
Volume
Issue
Start Page
1-4
End Page
4
PlumX Metrics
Citations
Scopus : 10
Captures
Mendeley Readers : 7
SCOPUS™ Citations
10
checked on Feb 03, 2026
Web of Science™ Citations
3
checked on Feb 03, 2026
Page Views
267
checked on Feb 03, 2026
Downloads
30
checked on Feb 03, 2026
Google Scholar™


