On the Distribution of the Threshold Voltage in Multi-Level Cell Flash Memories

Abstract

In Multi-Level Cell (MLC) memories, multiple bits of information are packed within the cell to enable higher capacity and lower cost of manufacturing compared to those of the single-level cell flash. However, because of heavy information packing, MLC memories suffer from several error sources including inter-cell interference, retention error, and random telegraph noise which make their lifetime shorter. Having so many error sources that are statistically hard to characterize makes it challenging to properly derive the underlying probability distribution of the sensed threshold voltage, which is vital for finding optimal decision rules to secure better detection performance and hence better lifetime. Although several recent works have already considered this problem, they mostly recourse to few loose assumptions that are far from being realistic. In this study, a more comprehensive/general analysis is conducted to derive the probability density function of the final sensed voltage, and through realistic simplifications, closed form expressions are presented. Extensive computer simulations corroborate the accuracy of the derived analytical expressions, and we think they shall be essential for accurately estimating the reliability and the overall lifetime of modern MLC memories.